10177MA301 TRANSFORMS AND PARTIAL DIFFERENTIAL EQUATIONS
(Common to all branches)
OBJECTIVES
The course objective is to develop the skills of the students in the areas of Transforms and
Partial Differential Equations. This will be necessary for their effective studies in a large
number of engineering subjects like heat conduction, communication systems, electro-optics
and electromagnetic theory. The course will also serve as a prerequisite for post graduate and
specialized studies and research.
UNIT 1.FOURIER SERIES
Dirichlet’s conditions – General Fourier series – Odd and even functions – Half range sine series – Half range cosine series – Complex form of Fourier Series – Parseval’s identify –Harmonic Analysis.
UNIT 2. FOURIER TRANSFORMS
Fourier integral theorem (without proof) – Fourier transform pair – Sine and Cosine
transforms – Properties – Transforms of simple functions – Convolution theorem – Parseval’s identity.
UNIT 3. PARTIAL DIFFERENTIAL EQUATIONS
Formation of partial differential equations – Solutions of standard types of first order partial
differential equations - Lagrange’s linear equation - Linear partial differential equations of second and higher order with constant coefficients.
UNIT 4. APPLICATIONS OF PARTIAL DIFFERENTIAL EQUATIONS
Solutions of one dimensional wave equation – One dimensional equation of heat conduction –
Steady state solution of two-dimensional equation of heat conduction (Insulated edges
excluded) – Fourier series solutions in cartesian coordinates.
UNIT 5. Z -TRANSFORMS AND DIFFERENCE EQUATIONS
Z-transforms -Elementary properties – Inverse Z-transform – Convolution theorem Formation of difference equations – Solution of difference equations using Z-transform.
TEXT BOOKS
1. T. Veerarajan, “Transforms and Partial Differential Equations”, Tata McGraw Hill, 2009
2. Grewal, B.S, “Higher Engineering Mathematics”, 40th Edition, Khanna publishers, Delhi
(2007)
REFERENCES
1. Ramana.B.V., “Higher Engineering Mathematics”, Tata Mc-GrawHill Publishing Company
limited, New Delhi
2. Glyn James, “Advanced Modern Engineering Mathematics”, Third Edition, Pearson
Education (2007).
3. Kandasamy, P., Thilagavathy, K., and Gunavathy, K., “Engineering Mathematics Volume
III”, S. Chand & Company Ltd., New Delhi
10144EC302 ELECTRICAL ENGINEERING
AIM
To expose the students to the concepts of various types of electrical machines and
transmission and distribution of electrical power.
OBJECTIVES
To impart knowledge on Constructional details, principle of operation, performance, starters
and testing of D.C. machines.
Constructional details, principle of operation and performance of transformers.Constructional
details, principle of operation and performance of induction motors.
Constructional details and principle of operation of alternators and special machines.
Power System transmission and distribution.
UNIT I D.C. MACHINES
Constructional details – emf equation – Methods of excitation – Self and separately excited
generators – Characteristics of series, shunt and compound generators – Principle of operation
of D.C. motor – Back emf and torque equation – Characteristics of series, shunt and
compound motors - Starting of D.C. motors – Types of starters - Testing, brake test and
Swinburne’s test – Speed control of D.C. shunt motors.
UNIT 2 TRANSFORMERS
Constructional details – Principle of operation – emf equation – Transformation ratio –
Transformer on no load – Parameters referred to HV/LV windings – Equivalent circuit –
Transformer on load – Regulation - Testing – Load test, open circuit and short circuit tests.
UNIT 3 INDUCTION MOTORS
Construction – Types – Principle of operation of three-phase induction motors – Equivalent
circuit – Performance calculation – Starting and speed control – Single-phase induction
motors (only qualitative treatment).
UNIT 4 SYNCHRONOUS AND SPECIAL MACHINES
Construction of synchronous machines-types – Induced emf – Voltage regulation; emf and
mmf methods – Brushless alternators – Reluctance motor – Hysteresis motor – Stepper motor.
UNIT 5 TRANSMISSION AND DISTRIBUTION
Structure of electric power systems – Generation, transmission and distribution systems -
EHVAC and EHVDC transmission systems – Substation layout – Insulators – cables.
TEXT BOOKS
1. D.P.Kothari and I.J.Nagrath, ‘Basic Electrical Engineering’, Tata McGraw Hill publishing
company ltd, Second Edition, 2007 (Reprint).
2. C.L. Wadhwa, ‘Electrical Power Systems’, New Age International, Fourth Edition, 2007.
REFERENCE BOOKS
1.S.K.Bhattacharya, “Electrical Machines”, Tata McGraw Hill Publishing company ltd,
second edition, 2007.
2.V.K.Mehta and Rohit Mehta, “Principles of Power System”, S.Chand and Company Ltd,
second edition, 2006.
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10144EC303 DATA STRUCTURES AND OBJECT ORIENTED PROGRAMMING IN
AIM
To provide an in-depth knowledge in problem solving techniques and data structures.
OBJECTIVES
To learn the systematic way of solving problems
To understand the different methods of organizing large amounts of data
To learn to program in C++
To efficiently implement the different data structures
To efficiently implement solutions for specific problems
UNIT – I PRINCIPLES OF OBJECT ORIENTED PROGRAMMING
Introduction- Tokens-Expressions-contour Structures –Functions in C++, classes and objects,
constructors and destructors ,operators overloading and type conversions .
UNIT – 2 ADVANCED OBJECT ORIENTED PROGRAMMING
Inheritance, Extending classes, Pointers, Virtual functions and polymorphism, File Handling
Templates ,Exception handling, Manipulating strings.
UNIT – 3 DATA STRUCTURES & ALGORITHMS
Algorithm, Analysis, Lists, Stacks and queues, Priority queues-Binary Heap-Application,
Heaps–hashing-hash tables without linked lists
UNIT – 4 NONLINEAR DATA STRUCTURES
Trees-Binary trees, search tree ADT, AVL trees, Graph Algorithms-Topological sort, shortest
path algorithm network flow problems-minimum spanning tree - Introduction to NP -
completeness.
UNIT – 5 SORTING AND SEARCHING
Sorting – Insertion sort, Shell sort, Heap sort, Merge sort, Quick sort, Indirect sorting, Bucket
sort, Introduction to Algorithm Design Techniques –Greedy algorithm (Minimum Spanning
Tree), Divide and Conquer (Merge Sort), Dynamic Programming (All pairs Shortest Path
Problem).
TEXT BOOKS:
1. Mark Allen Weiss, “Data Structures and Algorithm Analysis in C”, Third Edition, Pearson
Education Asia, 2007.
2. E. Balagurusamy, “Object Oriented Programming with C++”, McGraw Hill Company Ltd.,
2007.
REFERENCES:
1. Langsam , Augenstein and Tanenbaum,”Data Structures using C and C++”, PHI Learning
Private Limited ,2010.
2.Michael T. Goodrich, “Data Structures and Algorithm Analysis in C++”, Wiley student
edition, 2007.
3.Sahni, “Data Structures Using C++”, The McGraw-Hill, 2006.
4. 5.Jean – Paul Tremblay & Paul G.Sorenson,” An Introduction to data structures with
applications”, Tata McGraw Hill Second Edition, 2002.
6.John R.Hubbard, “Schaum’s outline of theory and problem of data structure with C++” ,
McGraw-Hill, New Delhi, 2000.
7. Robert Lafore,” Object oriented programming in C++”, Galgotia Publication.
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10144EC304 DIGITAL ELECTRONICS
AIM
To learn the basic methods for the design of digital circuits and provide the fundamental
concepts used in the design of digital systems.
OBJECTIVES
To introduce basic postulates of Boolean algebra and shows the correlation between Boolean
expressions
To introduce the methods for simplifying Boolean expressions
To outline the formal procedures for the analysis and design of combinational circuits and
sequential circuits
To introduce the concept of memories and programmable logic devices.
To illustrate the concept of synchronous and asynchronous sequential circuits
UNIT I MINIMIZATION TECHNIQUES AND LOGIC GATES
Minimization Techniques: Boolean postulates and laws – De-Morgan’s Theorem - Principle
of Duality - Boolean expression - Minimization of Boolean expressions –– Minterm –
Maxterm - Sum of Products (SOP) – Product of Sums (POS) – Karnaugh map Minimization –
Don’t care conditions - Quine-McCluskey method of minimization. Logic Gates: AND, OR,
NOT, NAND, NOR, Exclusive–OR and Exclusive–RImplementations of Logic Functions
using gates, NAND–NOR implementations – ulti level gate implementations- Multi output
gate implementations. TTL and CMOS Logic and their characteristics – Tristate gates.
UNIT 2 COMBINATIONAL CIRCUITS
Design procedure – Half adder – Full Adder – Half subtractor – Full subtractor - Parallel
binary adder, parallel binary Subtractor – Fast Adder - Carry Look Ahead adder – Serial
Adder/Subtractor - BCD adder – Binary Multiplier – Binary Divider - Multiplexer/
Demultiplexer – decoder - encoder – parity checker – parity generators - code converters -
Magnitude Comparator.
UNIT 3 SEQUENTIAL CIRCUITS
Latches, Flip-flops - SR, JK, D, T, and Master-Slave – Characteristic table and equation
Application table – Edge triggering – Level Triggering – Realization of one flip flop using
other flip flops – serial adder/subtractor- Asynchronous Ripple or serial counter –
Asynchronous Up/Down counter - Synchronous counters – Synchronous Up/Down counters –
Programmable counters – Design of Synchronous counters: state diagram- State table –State
minimization –State assignment - Excitation table and maps-Circuit implementation -
Modulo–n counter, Registers – shift registers - Universal shift registers – Shift register
counters – Ring counter – Shift counters - Sequence generators.
UNIT 4 SYNCHRONOUS AND AYNCHRONOUS SEQUENTIAL CIRCUITS
Synchronous Sequential Circuits: General Model – Classification – Design – Use of
Algorithmic State Machine – Analysis of Synchronous Sequential Circuits Asynchronous
Sequential Circuits: Design of fundamental mode and pulse mode circuits – Incompletely
specified State Machines – Problems in Asynchronous Circuits – Hazards – Static and
dynamic -Design of Hazard Free Switching circuits. Introduction to Verilog -Design of
Combinational and Sequential circuits using VERILOG like Adder Subtractor and
Synchronous counters
UNIT 5 MEMORY DEVICES
Classification of memories – ROM -ROM organization -PROM – EPROM – EEPROM –
EAPROM, RAM – RAM organization – Write operation – Read operation – Memory cycle -
Timing wave forms – Memory decoding – memory expansion – Static RAM Cell-Bipolar
RAM cell – MOSFET RAM cell – Dynamic RAM cell –Programmable Logic Devices –
Programmable Logic Array (PLA) -Programmable Array Logic (PAL) -Field Programmable
Gate Arrays (FPGA) -Implementation of combinational logic circuits using ROM, PLA, PAL
TEXT BOOKS
1. M. Morris Mano, “Digital Design”, Third Edition, Prentice Hall of India Pvt. Ltd, 2003 /
Pearson Education (Singapore) Pvt. Ltd., New Delhi, 2003.
2. S. Salivahanan and S. Arivazhagan,” Digital Circuits and Design”, Third Edition.,Vikas
Publishing House Pvt. Ltd, New Delhi, 2006.
REFERENCES
1.A.Anand Kumar,” Fundamentals of Digital circuits”, Second Edition, PHI Learning Private
Limited ,2010
2.Thomas L. Floyd, “Digital Fundamentals”, Eigth Edition, Pearson Education Inc, New
Delhi, 2003
3. Charles H.Roth. “Fundamentals of Logic Design”, Thomson Learning, 2003.
4. Donald P.Leach and Albert Paul Malvino, Digital Principles and Applications,
Sixth Edition, TMH, 2003.
5. William H. Gothmann, “ Digital Electronics”, Second Edition, PHI, 1982.
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10144EC305 SIGNALS AND SYSTEMS
AIM
To study and analyze characteristics of continuous, discrete signals and systems.
OBJECTIVES
To study the properties and representation of discrete and continuous signals.
To study the sampling process and analysis of discrete systems using ztransforms.
To study the analysis and synthesis of discrete time systems.
UNIT 1. CLASSIFICATION OF SIGNALS AND SYSTEMS
Continuous time signals (CT signals), discrete time signals (DT signals) - Step, Ramp, Pulse,
Impulse, Exponential, Classification of CT and DT signals - periodic and periodic, random
singals, CT systems and DT systems, Basic properties of systems - Linear Time invariant
Systems and properties.
UNIT 2. ANALYSIS OF CONTINUOUS TIME SIGNALS
Fourier series analysis, Spectrum of C.T. singals, Fourier Transform and Laplace Transform
in Signal Analysis.
UNIT 3. ANALYSIS OF DISCRETE TIME SIGNALS
Sampling of CT signals and aliasing, DTFT and properties, Z-transform and properties of Ztransform.
UNIT 4. LINEAR TIME INVARIANT –CONTINUOUS TIME SYSTEMS
Differential equation, Block diagram representation, Impulse response, Convolution integral,
frequency response , Fourier and Laplace transforms in analysis, State variable equations and
matrix representation of systems
UNIT 5. LINEAR TIME INVARIANT - DISCRETE TIME SYSTEMS
Difference equations, Block diagram representation, Impulse response, Convolution sum, LTI
systems analysis using DTFT and Z-transforms , State variable equations and matrix
representation of systems.
TEXT BOOK:
1. Allan V.Oppenheim, S.Wilsky and S.H.Nawab, “Signals and Systems”,
Second Edition, PHI, 2010.
2. Gurung J.B,”Signals and Systems “, PHI learning private Limited ,2009
REFERENCES:
1. H P Hsu, Rakesh Ranjan“ Signals and Systems”, Schaum’s Outlines, Tata McGraw Hill,
Indian Reprint, 2007 .
2. Simon Haykins and Barry Van Veen, “Signals and Systems”, John Wiley & sons , Inc,
2004.
3. Ramakrishna Rao.P, “Signals and Systems” , Second Edition, TMH, 2008.
4. S.Palani, Signals and Systems, Ane Books Pvt. Ltd., 2009.
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10144EC306 ELECTRONIC CIRCUITS - I
AIM
The aim of this course is to familiarize the student with the analysis and design of basic
transistor Amplifier circuits and power supplies.
OBJECTIVE
To understand:
The methods of biasing transistors,
Design of simple amplifier circuits,
Midband analysis of amplifier circuits using small - signal equivalent circuits to determine
gain input impedance and output impedance ,
Method of calculating cutoff frequencies and to determine bandwidth
Design of power amplifiers, Analysis and design of power supplies.
UNIT I TRANSISTOR BIAS STABILITY
BJT – Need for biasing – Stability factor - Fixed bias circuit, Load line and quiescent point.
Variation of quiescent point due to FE h variation within manufacturers tolerance - Stability
factors - Different types of biasing circuits - Method of stabilizing the Q point - Advantage of
Self bias (voltage divider bias) over other types of biasing, Bias compensation – Diode,
Thermister and Sensistor compensations, Biasing the FET and MOSFET.
UNIT 2 MIDBAND ANALYSIS OF SMALL SIGNAL AMPLIFIERS
CE, CB and CC amplifiers - Method of drawing small-signal equivalent circuit - Midband
analysis of various types of single stage amplifiers to obtain gain, input impedance and output
impedance - Miller’s theorem - Comparison of CB, CE and CC amplifiers and their uses -
Methods of increasing input impedance using Darlington connection and bootstrapping - CS,
CG and CD (FET) amplifiers - Multistage amplifiers. Basic emitter coupled differential
amplifier circuit - Bisection theorem.
UNIT 3 FREQUENCY RESPONSE OF AMPLIFIERS
General shape of frequency response of amplifiers - Definition of cutoff frequencies and
bandwidth - Low frequency analysis of amplifiers to obtain lower cutoff frequency Hybrid – .
equivalent circuit of BJTs - High frequency analysis of BJT amplifiers to obtain upper cutoff
frequency – Gain Bandwidth Product - High frequency equivalent circuit of FETs - High
frequency analysis of FET amplifiers - Gain-bandwidth product of FETs - General expression
for frequency response of multistage amplifiers - Calculation of overall upper and lower
cutoff frequencies of multistage amplifiers - Amplifier rise time and sag and their relation to
cutoff frequencies.
UNIT 4 LARGE SIGNAL AMPLIFIERS
Classification of amplifiers, Class A large signal amplifiers, second harmonic distortion,
higher order harmonic distortion, transformer-coupled class A audio power amplifier –
efficiency of Class A amplifiers. Class B amplifier – efficiency -push-pull amplifier distortion
in amplifiers -complementary-symmetry (Class B) push-pull amplifier, Class C, Class D
amplifier – Class S amplifier – MOSFET power amplifier, Thermal stability and heat sink.
UNIT 5 RECTIFIERS AND POWER SUPPLIES
Classification of power supplies, Rectifiers -Half-wave, full-wave and bridge rectifiers with
resistive load. Analysis for Vdc and ripple voltage with C, L, LC and CLC filters. Voltage
multipliers, Voltage regulators -Zener diode regulator, principles of obtaining a regulated
power supply, regulator with current limiting, Over voltage protection, Switched mode power
supply (SMPS), Power control using SCR.
TEXT BOOKS
1. Millman J and Halkias .C.,” Integrated Electronics”, TMH, 2007.
2. S. Salivahanan, N. Suresh Kumar and A. Vallavaraj,” Electronic Devices and Circuits”, 2nd
Edition, TMH, 2007.
REFERENCES
1. Robert L. Boylestad and Louis Nashelsky,” Electronic Devices and Circuit Theory”, nineth
Edition, PHI, 2007
2. David A. Bell, “Electronic Devices & Circuits”, fourth Ediion, PHI, 2007
3. Floyd, Electronic Devices, Sixth Edition, Pearson Education, 2002.
4. Allen Mottershead, “Electronic Devices and Circuits An Introduction”, PHI, 2010.
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10144EC307 DIGITAL ELECTRONICS LAB
1. Design and implementation of Adder and Subtractor using logic gates.
2. Design and implementation of code converters using logic gates
(i) BCD to excess-3 code and vice versa
(ii) Binary to gray and vice-versa
3. Design and implementation of 4 bit binary Adder/ subtractor and BCD adder using IC 7483
4. Design and implementation of 2 bit Magnitude Comparator using logic gates 8 Bit
Magnitude Comparator using IC 7485
5. Design and implementation of 16 bit odd/even parity checker generator using IC74180.
6. Design and implementation of Multiplexer and De-multiplexer using logic gates and study
of IC74150 and IC 74154
7. Design and implementation of encoder and decoder using logic gates and study of IC7445
and IC74147
8. Construction and verification of 4 bit ripple counter and Mod-10 / Mod-12 Ripple counters
9. Design and implementation of 3-bit synchronous up/down counter
10. Implementation of SISO, SIPO, PISO and PIPO shift registers using Flip-flops
11. Design of experiments 1, 6, 8 and 10 using Verilog Hardware Description Language
10144EC308 ELECTRONIC CIRCUITS LAB I
(Common to ECE & Bio Medical Engineering)
Expt No.1 Fixed Bias amplifier circuit using BJT
1. Waveforms at input and output without bias.
2. Determination of bias resistance to locate Q-point at center of load line.
3. Measurement of gain.
4. Plot the frequency response & Determination of Gain Bandwidth Product
Expt No.2 Design and construct BJT Common Emitter Amplifier using voltage divider
bias (self-bias) with and without bypassed emitter resistor.
1. Measurement of gain.
2. Plot the frequency response & Determination of Gain Bandwidth Product
Expt No.3 Design and construct BJT Common Collector Amplifier using voltage divider
bias (self-bias).
1. Measurement of gain.
2. Plot the frequency response & Determination of Gain Bandwidth
Expt No.4 Darlington Amplifier using BJT.
1. Measurement of gain and input resistance.
2. Comparison with calculated values.
3. Plot the frequency response & Determination of Gain Bandwidth
Product
Expt No.5 Source follower with Bootstrapped gate resistance
1. Measurement of gain, input resistance and output resistance with and
without Bootstrapping.
2. Comparison with calculated values.
Expt No.6 Differential amplifier using BJT
1. Measurement of CMRR.
Expt No.7 Class A Power Amplifier
1. Observation of output waveform.
2. Measurement of maximum power output.
3. Determination of efficiency.
4. Comparison with calculated values.
Expt No.8 Class B Complementary symmetry power amplifier
1. Observation of the output waveform with crossover Distortion.
2. Modification of the circuit to avoid crossover distortion.
3. Measurement of maximum power output.
4. Determination of efficiency.
5. Comparison with calculated values.
Expt No.9 Power Supply circuit -Half wave rectifier with simple capacitor filter.
1. Measurement of DC voltage under load and ripple factor, Comparison
with calculated values.
2. Plot the Load regulation characteristics using Zener diode.
Expt No.10 Power Supply circuit -Full wave rectifier with simple capacitor filter
1.Measurement of DC voltage under load and ripple factor, Comparison
with calculated values.
2.Measurement of load regulation characteristics. Comparison with
calculated values.
10144EC309 DATA STRUCTURES AND OBJECT ORIENTED PROGRAMMING
1. Basic Programs for C++ Concepts
2. Array implementation of List Abstract Data Type (ADT)
3. Linked list implementation of List ADT
4. Cursor implementation of List ADT
5. Stack ADT -Array and linked list implementations
The next two exercises are to be done by implementing the following source files
(a) Program source files for Stack Application 1
(b) Array implementation of Stack ADT
(c) Linked list implementation of Stack ADT
(d) Program source files for Stack Application 2
An appropriate header file for the Stack ADT should be #included in (a) and (d)
6. Implement any Stack Application using array implementation of Stack ADT (by
Implementing files (a) and (b) given above) and then using linked list
Implementation of Stack ADT (by using files (a) and implementing file (c))
7. Queue ADT – Array and linked list implementations
8. Search Tree ADT -Binary Search Tree
9. Heap Sort
10. Quick Sort
