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Sunday, 22 December 2013

10144EC605 COMPUTER ARCITECTURE AND ORGANIZATION L T P C-3 0 0 3



UNIT1 INTRODUCTION 9
Computing and Computers, Evolution of Computers, VLSI Era, System Design- Register Level,
Processor - Level, CPU Organization, Data Representation, Fixed – Point Numbers,
Floating Point Numbers, Instruction Formats, Instruction Types. Addressing modes.
UNIT 2 DATA PATH DESIGN 9
Fixed Point Arithmetic, Addition, Subtraction, Multiplication and Division, Combinational and
Sequential ALUs, Carry look ahead adder, Robertson algorithm, booth’s algorithm, nonrestoring
division algorithm, Floating Point Arithmetic, Coprocessor, Pipeline
Processing, Pipeline Design, Modified booth’s Algorithm
UNIT 3 CONTROL DESIGN 9
Hardwired Control, Microprogrammed Control, Multiplier Control Unit, CPU Control Unit,
Pipeline Control, Instruction Pipelines, Pipeline Performance, Superscalar Processing, Nano
Programming.
UNIT 4 MEMORY ORGANIZATION 9
Random Access Memories, Serial - Access Memories, RAM Interfaces, Magnetic
Surface Recording, Optical Memories, multilevel memories, Cache & Virtual Memory,
Memory Allocation, Associative Memory.
UNIT 5 SYSTEM ORGANIZATION 9
Communication methods, Buses, Bus Control, Bus Interfacing, Bus arbitration, IO and
system control, IO interface circuits, Handshaking, DMA and interrupts, vectored
interrupts, PCI interrupts, pipeline interrupts, IOP organization, operation systems,
multiprocessors, fault tolerance, RISC and CISC processors, Superscalar and vector
processor.
TOTAL= 45 PERIODS
TEXTBOOKS:
1. John P.Hayes, “ Computer architecture and Organisation”, Tata McGraw-Hill, Third
edition, 1998.
2. V.Carl Hamacher, Zvonko G. Varanesic and Safat G. Zaky, “ Computer
Organisation“, V edition, McGraw-Hill Inc, 1996.
REFERENCES:
1. Morris Mano, “Computer System Architecture”, Pearson Education, 2000.
2. P.Pal Chaudhuri, , “Computer organization and design”, 2nd Ed., Prentice Hall of
India, 2007
3. Rao, “Computer system Architecture”, PHI, 2009.

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